smsc lpc47n217 page 1 revision 0.2 (03-29-07) product preview lpc47n217 64-pin super i/o with lpc interface data brief product features ? 3.3 volt operation (5v tolerant) ? programmable wakeup event interface (io_pme# pin) ? smi support (io_smi# pin) ? gpios (14) ? two irq input pins ? xnor chain ? pc99a, pc2001 ? acpi 2.0 compliant ? 64-pin stqfp lead-free rohs compliant package ? intelligent auto power management ? serial ports ? one full function serial port ? high speed 16c550a compatible uart with send/receive 16-byte fifo ? supports 230k and 460k baud ? programmable baud rate generator ? modem control circuitry ? infrared communications controller ? irda v1.2 (4mbps), hpsir, askir, consumer ir support ? 1 ir port ? 96 base i/o address, 15 irq options and 3 dma options ? multi-mode parallel port with chiprotect ? standard mode ibm pc/xt, pc/at, and ps/2 compatible bidirectional parallel port ? enhanced parallel port (epp) compatible - epp 1.7 and epp 1.9 (ieee 1284 compliant) ? ieee 1284 compliant enhanced capabilities port (ecp) ? chiprotect circuitry fo r protection against damage due to printer power-on ? 192 base i/o address, 15 irq and 3 dma options ? lpc bus host interface ? multiplexed command, address and data bus ? 8-bit i/o transfers ? 8-bit dma transfers ? 16-bit address qualification ? serial irq interface compatible with serialized irq support for pci systems ? pci clkrun# support ? power management event (io_pme#) interface pin ordering information order number: lpc47n217-jv for 64 pin stqfp lead-free rohs compliant package downloaded from: http:///
revision 0.2 (03-29-07) page 2 smsc lpc47n217 product preview 80 arkay drive, hauppauge, ny 11788 (631) 435-6000, fax (631) 273-3123 copyright ? 2007 smsc or its subs idiaries. all rights reserved. circuit diagrams and other information rela ting to smsc products are included as a m eans of illustrating typical applications. consequently, complete information sufficient for construction pur poses is not necessarily given. although the informat ion has been checked and is bel ieved to be accurate, no responsibility is assumed for ina ccuracies. smsc reserves the ri ght to make changes to specif ications and product descriptions at any time without notice. contact your local smsc sales office to obtain the late st specifications bef ore placing your product order. the provisi on of this information does not convey to the purchas er of the described semiconducto r devices any licenses under any patent rights or other intellectual property rights of smsc or others. all sales are expressly conditional on your agr eement to the terms and conditions of the most re cently dated ve rsion of smsc's standard terms of sale agreement dated before the date of y our order (the "terms of sale ag reement"). the product may contain d esign defects or errors known as anomalies which may cause the product's f unctions to deviate from published s pecifications. a nomaly sheets are available upon request. smsc products are not des igned, intended, authorized or wa rranted for use in any life support or other application whe re product failure could cause or contri bute to personal injury or severe property damage. an y and all such uses without prior written approval of an officer of smsc and further testing and/or modification will be fully at the risk of the customer. copies of this document or other smsc litera ture, as well as the terms of sale agreement, may be obtained by visiting smscs website at http:// www.smsc.com. smsc is a registered tr ademark of standard microsystems corporation (smsc). product names and company names are the trademarks of their respective holders. smsc disclaims and excludes any and all warranties, including without limitation any and all implied warranties of merchantability, fitness for a particular purpose, ti tle, and against infringement and the like, and any and all warranties arising from any course of dealing or usag e of trade. in no event shall smsc be liable for any direct, incidental, indirect, special, p unitive, or consequential damages; or for lost data, profits, savings or revenues of any kind; regardless of the form of action, whether based on contract; tort; negligence of smsc or others; strict liability; breach of warranty; or othe rwise; whether or not any remedy of buyer is held to have failed of its essential purpose, and whether or no t smsc has been advised of the possibility of such damages. downloaded from: http:///
smsc lpc47n217 page 3 revision 0.2 (03-29-07) product preview general description the smsc lpc47n217 is a 3.3v pc 99, pc2001, and acpi 2.0 compliant super i/o controller. the lpc47n217 implements the lpc interfac e, a pin reduced isa interface whic h provides the same or better performance as the isa/x-bus with a substantial savings in pins us ed. the part also includes 14 gpio pins. the lpc47n217 incorporates a 16c550a compatib le uart and one multi-mode parallel port with chiprotect ? circuitry plus epp and ecp support. this device also offers a full 16-bit internally decoded address bus, a serial irq interface with pci clkrun# support, relocatable conf iguration ports, and three dma channel options. the on-chip uart is compatible with the 16c550a. there is a dedicated serial infrared interface uart, which complies with irda v1.2 (fast ir), hpsir, and askir formats (used by sharp and other pdas), as well as consumer ir. the parallel port is compatible with ibm pc/at ar chitectures, as well as ieee 1284 epp and ecp. the parallel port chiprotect ? circuitry prevents damage caused by an attached powered printer when the lpc47n217 is not powered. the lpc47n217 features software configurable logic (s cl) for ease of use. scl allows programmable system configuration of key functions such as the parallel port and uart. the lpc47n217 supports the isa pl ug-and-play standard register set (version 1.0a) and provides the recommended functionality to support windows operating systems, pc99, and pc2001. the i/o address, dma channel, and hardware irq of each device in the lpc47n217 may be r eprogrammed through the internal configuration regi sters. there are multiple i/o address loca tion options, a serialized irq interface, and three dma channels. downloaded from: http:///
revision 0.2 (03-29-07) page 4 smsc lpc47n217 product preview block diagram txd1, nrts1, ndtr1 ser_irq pci_clk vcc vss io_pme# denotes multifunction pins irtx2, irmode* irrx2, irrx3* serial irq lpc bus interface v tr clock gen clocki smi pme wdt * 16c550 compatible serial port 1 ncts1, rxd1, ndsr1, ndcd1, nri1 configuration registers general purpose i/o gp10, gp11, gp12*, gp13*, gp14*, gp23*, gp4[0:7] multi-mode parallel port pd[0:7], busy, slct, pe, nerror, nack nslctin, nalf ninit, nstrobe control, address, data lad0lad1 lad2 lad3 lframe# ldrq# lpcpd# pci_reset# acpi block io_smi#* infrared interface clkrun# irqin1*, irqin2* figure 1 - lpc47n217 block diagram downloaded from: http:///
smsc lpc47n217 page 5 revision 0.2 (03-29-07) product preview package outline figure 2 - 64 pin stqfp package ou tline, 7x7x1.4 body, 2 mm footprint table 1 - 64 pin stqfp package parameters min nominal max remarks a ~ ~ 1.60 overall package height a1 0.05 ~ 0.15 standoff a2 1.35 1.40 1.45 bod y thickness d 8.80 9.00 9.20 x span d1 6.80 7.00 7.20 x bod y size e 8.80 9.00 9.20 y span e1 6.80 7.00 7.20 y bod y size h 0.09 ~ 0.20 lead frame thickness l 0.45 0.60 0.75 lead foot len g th l1 ~ 1.00 ref. ~ lead len g th e 0.40 basic lead pitch 0 o ~ 7 o lead foot angle w 0.13 0.18 0.23 lead width ccc ~ ~ 0.08 coplanarit y notes: 1. controlling unit: millimeter. 2. tolerance on the true position of the leads is 0.035 mm maximum. 3. package body dimensions d1 and e1 do not include the mold protrusion. maximum mold protrusion is 0.25 mm per side. d1 and e1 dimensions determined at datum plane h. 4. dimension for foot length l measured at the gauge plane 0. 25 mm above the seating plane. 5. details of pin 1 identifier are optional but must be locat ed within the zone indicated. downloaded from: http:///
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